Copper Filled Via'sPlated Cu via fill is a cost effective, alternative approach to the silver filled via methodology.When board surface real state is at a premium, board manufacturers employ varying material to fill the vias allowing them to plate over the filled via. This process converts the via into a surface mount pad or contact point. This methodology is also employed when the pitch of a component requires a build-up approach as seen in the first photo to your right. The advantages of Cu filling the vias as apposed to many other fill materials are primarily cost, and the superior thermal conductivity of the Cu. The Cu filled vias are formed utilizing one of two modified periodic reverse pulse plating process. The first approach uses a photo mask to cover the surface of the panel exposing only the vias to be filled, and a small annular ring. This method is referred to as the dot-shot method. The second photo to the right demonstrates a domed shaped filled via, formed by the photo mask, immediately after the plating process. At this point the excess Cu or dome needs to be sanded parallel to the base Cu, typically 1/2oz base Cu. This provides an ideal layer for etching fine lines down to .002”. However, it leaves a so-called but joint, which is a situation where the plated Cu plates up to, and against the base Cu, butting up against it but not wrapping around on top of the base Cu, as in a traditional via. The third photo to your right demonstrates a plated via after sanding. However, when this micro section is micro etched it reveals a butt joint as seen in the fourth photo to your right! The arrows on the photo above indicate the base Cu. This is the point to which the board would have been sanded. (the section above was not sanded) Many of R&D’s hi-reliability customers don’t accept but jointed vias as they are seen as a source for potential failures. However, many commercial customers utilize this approach in order to take advantage of the benefits of fine line etching on theses layers. The alternative approach to the dot-shot method is the panel plated Cu via fill method. In this method the Cu vias are plated without a mask, and therefore incidental Cu is plated on the surface of the board as well as in the hole. This incidental Cu is plated to a thickness of ~1oz, or .0014”. Since this Cu is plated with a periodic reverse pulse process it maintains a consistent thickness across the panel of ~ .00035”. However, the combined thickness of the plated, and base Cu prevents fine line etching limiting the lines and spaces to ~.004”-.006”. Both of these processes create a suitable platform for either a stacked build-up blind via, or a surface pad for attach, or probing. It is important to note that both of these processes contain the potential for a small percentage of vias to trap voids in the center of the plated via. These voids can contain plating solutions as well. The fifth photo to your right demonstrates a void ~.001” in diameter. These voids can be as little as .0005”, and are extremely difficult to find in a cross section. Please refer to the following chart for design specs: To avoid the potential of voids the Aspect ratio of the hole diameter to the dielectric which it penetrates should be kept to 2:1. As indicated by the following:
Materials AvailableThere are a host of materials available for use in space transformer designs, including high-speed materials, and Teflon fusion bonding. Please contact a R&D sales engineer to help you make a selection or download our material data sheets in our materials section. |
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